Power-on self-test (POST) is the common term for a computer's, router's or printer's pre-boot sequence. Though the same basic sequence is present on all computer architectures, it may go by different names such as initial program load (IPL), booting, or bootstrapping. The term POST, however, has become popular in association with and as a result of the proliferation of the PC. It can be used as a noun when referring to the code that controls the pre-boot phase or when referring to the phase itself. It can also be used as a verb when referring to the code or the system as it progresses through the pre-boot phase. Alternatively this may be called "POSTing".

General internal workings

On the PC, the main duties of POST are handled by the BIOS, which may hand some of these duties to other programs designed to initialize very specific peripheral devices, notably for video and SCSI initialization. These other duty-specific programs are generally known collectively as option ROMs or individually as the video BIOS, SCSI BIOS, etc.

The principal duties of the main BIOS during POST are as follows:

• verify the integrity of the BIOS code itself
• determine the reason POST is being executed
• find, size, and verify system main memory
• discover, initialize, and catalog all system buses and devices
• pass control to other specialized BIOSes (if and when required)
• provide a user interface for systems configuration
• identify, organize, and select which devices are available for booting
• construct whatever system environment that is required by the target OS

The BIOS will begin its POST duties when the CPU is reset. The first memory location the CPU tries to execute is known as the reset vector. In the case of a cold boot, the northbridge will direct this code fetch (request) to the BIOS located on the system flash memory. For a warm boot, the BIOS will be located in the proper place in RAM and the northbridge will direct the reset vector call to the RAM.

During the POST flow of a contemporary BIOS, one of the first things a BIOS should do is determine the reason it is executing. For a cold boot, for example, it may need to execute all of its functionality. If, however, the system supports power savings or quick boot methods, the BIOS may be able to circumvent the standard POST device discovery, and simply program the devices from a preloaded system device table.

The POST flow for the PC has developed from a very simple, straightforward process to one that is complex and convoluted. During POST, the BIOS must integrate a plethora of competing, evolving, and even mutually exclusive standards and initiatives for the matrix of hardware and OSes the PC is expected to support. However, the average user still knows the POST and BIOS only through its simple visible memory test and setup screen.

Fundamental structure

In the case of the IBM PC compatible machines, the main BIOS is divided into two basic sections. The POST section, or POST code, is responsible for the tasks mentioned above, and the environment POST constructs for the OS is known as the runtime code, the runtime BIOS, or the runtime footprint. Primarily these two divisions can be distinguished in that POST code should be flushed from memory before control is passed to the target OS while the runtime code remains resident in memory. This division may be a misleading oversimplification, however, as many Runtime functions are executed while the system is POSTing.

Error reporting

The original IBM BIOS reported errors detected during POST by outputting a number to a fixed I/O port address, 80. Using a logic analyzer or a dedicated POST card, an interface card that shows port 80 output on a small display, a technician could determine the origin of the problem. (Note that once an operating system is running on the computer, the code displayed by such a board is often meaningless, since some OSes, e.g. Linux, use port 80 for I/O timing operations.) In later years, BIOS vendors used a sequence of beeps from the motherboard-attached loudspeaker to signal error codes.

Original IBM POST error codes

• 1 short beep - Normal POST - system is OK
• 2 short beeps - POST error - error code shown on screen
• No beep - Power supply or system board problem
• Continuous beep - Power supply, system board, or keyboard problem
• Repeating short beeps - Power supply or system board problem
• 1 long, 1 short beep - System board problem
• 1 long, 2 short beeps - Display adapter problem (MDA, CGA)
• 1 long, 3 short beeps - Enhanced Graphics Adapter (EGA)
• 3 long beeps - 3270 keyboard card

POST AMI BIOS beep codes

• 1 - Memory refresh timer error
• 2 - Parity error in base memory (first 64 KiB block)
• 3 - Base memory read/write test error
• 4 - Mother board timer not operational
• 5 - Processor error
• 6 - 8042 Gate A20 test error (cannot switch to protected mode)
• 7 - General exception error (processor exception interrupt error)
• 8 - Display memory error (system video adapter)
• 9 - AMI BIOS ROM checksum error
• 10 - CMOS shutdown register read/write error
• 11 - Cache memory test failed

Reference: AMIBIOS8 Check Point and Beep Code List, version 1.71, last updated 7 June 2005

POST beep codes on CompTIA A+ Hardware Core exam

These POST beep codes are covered specifically on the CompTIA A+ Core Hardware Exam:

IBM POST diagnostic code descriptions

• 100 to 199 - System board
• 200 to 299 - Memory
• 300 to 399 - Keyboard
• 400 to 499 - Monochrome display
• 500 to 599 - Color/graphics display
• 600 to 699 - Floppy-disk drive or adapter
• 700 to 799 - Math coprocessor
• 900 to 999 - Parallel printer port
• 1000 to 1099 - Alternate printer adapter
• 1100 to 1299 - Asynchronous communication device, adapter, or port
• 1300 to 1399 - Game port
• 1400 to 1499 - Color/graphics printer
• 1500 to 1599 - Synchronous communication device, adapter, or port
• 1700 to 1799 - Hard drive and/or adapter
• 1800 to 1899 - Expansion unit (XT)
• 2000 to 2199 - Bisynchronous communication adapter
• 2400 to 2599 - EGA system-board video (MCA)
• 3000 to 3199 - LAN adapter
• 4800 to 4999 - Internal modem
• 7000 to 7099 - Phoenix BIOS chips
• 7300 to 7399 - 3.5-inch disk drive
• 8900 to 8999 - MIDI adapter
• 11200 to 11299 - SCSI adapter
• 21000 to 21099 - SCSI fixed disk and controller
• 21500 to 21599 - SCSI CD-ROM system

See also

• Booting
• Windows NT Startup Process

External links

• Bios Central - AMI/AMIT BIOS Post Codes
• AMIBIOS8 Check Point and Beep Code List, version 1.7, last updated 6 December 2004
• Power On Self Test Beep Codes for AMI and Phoenix BIOS - from PC Hell.
• Computer Hardware - Additional information on computer POST / Beep Codes - from Computer Hope.
• Hardware Diagnostics
• BIOS Central

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