High-k Dielectric

The term high-κ dielectric refers to materials with a high dielectric constant (κ) which may be used in next generation semiconductor components to replace the SiO₂ gate dielectric, especially for the low standby power (LSTP) applications. With the continued scaling of the gate oxide to below 2 nm, leakage currents due to tunneling are very high, so the thickness must be increased without reducing the associated capacitance. FET_cross_section.png showing the gate oxide dielectric]]

From an electrical standpoint, the MOS structure is equivalent to a parallel plate capacitor. When a voltage is applied between the gate and source terminals, the resulting electric field penetrates through the oxide, creating a so-called "inversion channel" within the channel underneath. The inversion channel is of the same type — P-type or N-type — as the source and drain of the transistor, providing a conduit through which current can pass. Ignoring quantum mechanical and depletion effects from the Si substrate and gate, the capacitance C of this parallel plate capacitor is given by

C=\frac{\kappa\epsilon_{0}A}{t}

Where

A is the capacitor area
$\kappa$ is the relative dielectric constant of the material (3.9 for silicon dioxide)
$\epsilon_{0}$ is the permittivity of free space

From the equation, it appears that decreasing the thickness t will increase the capacitance of the structure, and thereby increase the number of charges in the channel and the drive current for a fixed value of gate voltage. However as already noted, the silicon dioxide layer thickness is reaching the limits of scaling. The alternative way of increasing capacitance is to use an insulator with a higher dielectric constant than silicon dioxide. In such a scenario, a thicker gate layer might be used which can reduce the leakage current flowing through the structure as well as improving the gate dielectric reliability

Justification for sustaining/increasing capacitance

The drive current

I_D

for a MOSFET can be written (using the gradual channel approximation) as

I_D = \frac{W}{L} \mu C_{inv}(V_{G}-V_{T}-\frac{V_{D}}{2})V_D

Where

W is the width of the transistor channel
L is the channel length
$\mu$ is the channel carrier mobility (assumed constant here)
$C_{inv}$ is the capacitance density associated with the gate dielectric when the underlying channel is in the inverted state
$V_{G}$ is the voltage applied to the transistor gate
$V_{D}$ is the voltage applied to the transistor drain
$V_{T}$ is the threshold voltage

It can be seen that in this approximation the drain current is proportional to the average charge across the channel with a potential $\frac{V_{D}}{2}$ and the average electric field $\frac{V_{D}}{L}$ along the channel direction. Initially, $I_{D}$ increases linearly with $V_{D}$ and then eventually saturates to a maximum when $V_{D, sat}=V_G-V_T$ to yield

I_{D,Sat} = \frac{W}{L} \mu C_{inv}\frac{(V_{G}-V_{T})^2}{2}

The term $(V_{G}-V_{T})$ is limited in range due to reliability and room temperature operation constraints, since too large a $V_{G}$ would create an undesirable, high electric field across the oxide. Furthermore, $V_{T}$ cannot easily be reduced below about 200 mV, because kT is approximately 25 mV at room temperature. Typical specification temperatures < 100 °C could therefore cause statistical fluctuations in thermal energy, which would adversely affect the desired the $V_{T}$ value. Thus, even in this simplified approximation, a reduction in the channel length or an increase in the gate dielectric capacitance will result in an increased $I_{D,sat}$ .

Materials and considerations

SiO₂ has a dielectric constant of about 3.9. Many materials systems are currently under consideration as potential replacements for SiO₂ as the gate dielectric material for sub-0.1 µm complementary metal-oxide-semiconductor CMOS and MOSFET technology. Currently, promising candidates for high-κ dielectrics are hafnium and zirconium silicates, and their oxides, typically deposited using atomic layer deposition. Hafnium silicate and zirconium silicate (zircon) have typical values of their dielectric constant ranging from 3.9 - 26. Typical values range from 10 - 12. A consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are

Permittivity
Band gap
Band alignment to silicon - sufficiently large band offsets are needed to keep the leakage current low and protect the film from hot carrier injection.
Thermodynamic stability
Minimization of electric fields due to phonons in the dielectric to reduce scattering in the Si substrate so as to achieve high mobility of charge carriers in the MOSFET channel
Minimization of the concentration of electrically charged and/or electrically active defects in the film
Film morphology - Amorphous or epitaxial films seem to be the promising candidates - polycrystalline materials are generally ruled out.
Interface quality
Compatibility with the current or expected materials to be used in processing for CMOS devices
Process compatibility - for one, the film must survive sufficiently high temperatures such as a Rapid thermal anneal to 1000 °C for say, 10 s (as dictated by the CMOS technological process)
Reliability
Stability against degradation by the electric field and injected carriers.
Precursor availability
Precursor and process costs

Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward successful integration into the expected processing conditions for future CMOS technologies, especially due to their tendency to form at interfaces with Si (e.g. silicates). These pseudobinary systems also thereby enable the use of other high-κ materials by serving as an interfacial high-κ layer. Higher dielectric constant materials are thus desirable for reducing the gate leakage while maintaining transistor performance for very thin dielectric layers. Other materials that have been studied include Al₂O₃, Gd₂O₃, Yb₂O₃, Dy₂O₃, Nb₂O₅, Y₂O₃, La₂O₃, ZrO₂, HfO₂, TiO₂, Ta₂O₅, SrTiO₃, Ba_xSr_1-xTiO₃, Zr_xSi_1-xO_y, Hf_xSi_1-xO_y, Al_xZr_1-xO₂ etc.

References

A good review article can be found at ^* - High-kappa gate dielectrics: Current status and materials properties considerations by Wilk G.D., Wallace R.M., Anthony J.M.; (J. App. Phys. 89 (10): 5243-5275 2001)
Houssa, M. (Ed.) (2003) High-κ Dielectrics Institute of Physics ISBN 0750309067 ^*
Huff, H.R., Gilmer, D.C. (Ed.) (2005) High Dielectric Constant Materials : VLSI MOSFET applications Springer ISBN 3540210814
Demkov, A.A, Navrotsky, A., (Ed.) (2005) Materials Fundamentals of Gate Dielectrics Springer ISBN 1402030770
"High dielectric constant gate oxides for metal oxide Si transistors" Robertson, J. (Rep. Prog. Phys. 69 327-396 2006) Institute Physics Publishing ^*

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Justification for sustaining/increasing capacitance

Materials and considerations

References