Sempron

Sempron is, as of 2006, AMD's entry-level desktop CPU, replacing the Duron processor and competing against Intel's Celeron D processor.

AMD coined the name from the Latin semper, which means always/everyday, with the purpose of stating that Sempron was the right appliance for everyday computing.

History and Features

The first Semprons were based on the Athlon XP architecture using the Thoroughbred/Thorton core. These models were equipped with the Socket-A interface, 256 KiB L2 cache, and 166 MHz Front side bus (FSB 333). Later, AMD introduced the Sempron 3000+, based on the Barton core (512 KiB L2-cache.) From a hardware and user standpoint, the Socket-A Semprons were essentially renamed Athlon-XP desktop CPUs. AMD has ceased production of all Socket-A Semprons.

The second generation (Paris/Palermo core) was based on the architecture of the Socket 754 Athlon 64. Some differences from Athlon 64 processors include a reduced cache size (either 128 or 256 KiB L2), and the absence of AMD64 support in earlier models. Apart from these differences, the Socket 754 Semprons share most features with the more powerful Athlon 64, including an integrated (on-die) memory controller, the HyperTransport bus, and AMD's "NX bit" feature.

In the second half of 2005, AMD added 64-bit support (AMD64) to the Sempron line. This revision of chips is often referred to as "Sempron 64" to differentiate it from the previous revision. The term is unofficial and not used by AMD. AMD's intent in releasing 64-bit entry-level processors was to further the market for 64-bit processors, which, at the time of Sempron 64's first release, was a niche market.

In 2006, AMD announced the Socket AM2 line of Sempron processors. These are functionally equivalent to the previous generation, except for the usage of a DDR2 SDRAM memory controller instead of DDR SDRAM. The TDP of the standard version remains at 62 W (watts), while the new "Energy Efficient Small Form Factor" version has a reduced 35 W TDP. As of 2006, AMD sells both Socket 754 and AM2 Semprons concurrently.

Models for Socket A

Thoroughbred B/Thorton (130 nm)

L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 256 KiB, fullspeed
MMX, 3DNow!, SSE
Socket A (EV6)
Front side bus: 166 MHz (FSB 333)
VCore: 1.6 V
First release: July 28, 2004
Clockrate: 1500 MHz - 2000 MHz (2200+ to 2800+)

Barton (130 nm)

L1-Cache: 64 + 64 Kb (Data + Instructions)
L2-Cache: 512 Kb, fullspeed
MMX, 3DNow!, SSE
Socket A (EV6)
Front side bus: 166 MHz - 200MHz(FSB 333 - 400)
VCore: 1.6 - 1.65 V
First release: September 17, 2004
Clockrate: 2000 - 2200 MHz (3300+)

Models for Socket 754

Paris (130 nm SOI)

L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 256 KiB, fullspeed
MMX, 3DNow!, SSE, SSE2
Enhanced Virus Protection (NX bit)
Integrated DDR1 memory controller
Socket 754, 800 MHz HyperTransport
VCore: 1.4 V
First release: July 28, 2004
Clockrate: 1800 MHz (3100+)
Stepping: CG (Part No.: *AX)

Palermo (90 nm SOI)

Early models (stepping D0) are downlabeled "Oakville" mobile Athlon64
L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 128/256 KiB, fullspeed
MMX, 3DNow!, SSE, SSE2
SSE3 support on E3 and E6 steppings
AMD64 on E6 stepping
Cool'n'Quiet (Sempron 3000+ and higher)
Enhanced Virus Protection (NX bit)
Integrated DDR1 memory controller
Socket 754, 800 MHz HyperTransport
VCore: 1.4 V
First release: February 2005
Clockrate: 1400 - 2000 MHz
- 128 KiB L2-Cache (Sempron 2600+, 3000+, 3300+)
- 256 KiB L2-Cache (Sempron 2500+, 2800+, 3100+, 3400+)
Steppings: D0 (Part No.: *BA), E3 (Part No.: *BO), E6 (Part No.: *BX)

Models for Socket AM2

Manila (90 nm SOI)

L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 128/256 KiB, fullspeed
MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit
Integrated DDR2 memory controller
Socket AM2, 800 MHz HyperTransport
VCore: 1.25/1.35/1.40 V (1.20/1.25 V for Energy Efficient SFF version)
First release: May 23, 2006
Clockrate: 1600 - 2000 MHz
- 128 KiB L2-Cache (Sempron 2800+, 3200+, 3500+)
- 256 KiB L2-Cache (Sempron 3000+, 3400+, 3600+)
Stepping: F2 (Part No.: *CN, *CW)

Future processors are anticipated to support Intel's new SSE4.

External links

AMD products | x86 microprocessors

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