POWER5 is a microprocessor developed by IBM. It is an improved variant of the highly successful POWER4. The principal changes are support for Simultaneous multithreading (SMT) and an on-die memory controller. Each CPU supports 2 threads; since it is a multicore chip, with 2 physical CPUs, each chip supports 4 logical threads. The POWER5 can be packaged in a DCM, with one dual core chip per module, or an MCM with 4 dual corechips per module. POWER5+ (presented on 3Q 2005) packages in QCM, 2 dual core chips.

See also

• IBM POWER Architecture
• PowerPC

External links

• Real World Technologies: Sizing up the Super Heavyweights, a comparison and analysis of the POWER5 and Montecito, that explains the major changes between the POWER4 to the POWER5, along with performance estimates

POWER architecture

POWER5