The PDP-8 was the first successful commercial minicomputer, produced by Digital Equipment Corporation (DEC) in the 1960s. It was introduced on March 22, 1965 * and was the first widely sold computer in the DEC PDP series of computers (the PDP-5 was not originally intended to be a general-purpose computer).
The PDP-8 was an historically important computer because of the advances in technology, I/O, software development, and operating system design that occurred during its reign. Until the rise of the generally available microcomputer, specifically the Apple II, it was most likely the best-selling computer in the world.
The earliest PDP-8 model (the so-called "Straight-8") used discrete transistor technology, packaged on flip chip cards, and was approximately the size of a compact refrigerator. This was followed by the PDP-8/S. By using a one-bit serial ALU implementation, the PDP-8/S was smaller, less expensive, but vastly slower than the original PDP-8. Intermediate systems (the PDP-8/I and /L, the PDP-8/E, /F, and /M, and the PDP-8/A) returned to a fully-parallel implementation and used TTL MSI logic. The last revisions of PDP-8 models used single custom CMOS microprocessors. There was never a historical "system on a chip". However, in recent years enthusiasts have created entire PDP-8 systems using single FPGA devices. (This is possible because an entire PDP-8, its main memory system, and its I/O equipment is collectively much less complex than even the cache memories used in most modern microprocessors.)
The I/O systems underwent huge changes during the PDP-8 era. Early PDP-8 models used a front panel interface, a paper-tape reader and a teletype printer with an optional paper-tape punch. Over time I/O systems such as magnetic tape, RS-232 and current loop dumb terminals, punched card readers, and fixed-head disks were added. Toward the end of the PDP-8 era, floppy disks and moving-head cartridge disk drives were popular I/O devices. Modern enthusiasts have created standard PC style IDE hard disk adapters for real and simulated PDP-8 computers.
I/O was supported through several different methods:
A rudimentary form of DMA called "three-cycle data break" was supported; this required the assistance of the processor. Essentially, "data break" moved some of common logic (needed to implement the I/O device) from each I/O device into one common copy of the logic within the processor, placing the processor in charge of maintaining the DMA address and word count registers. In three successive memory cycles, the processor would update the word count, update the transfer address, and finally store or retrieve the actual I/O data word. By the time the PDP-8/E was introduced, this logic had become cheap and "one-cycle data break" became more popular, moving back to the individual I/O devices all the responsibility for maintaining the word count and transfer address registers; this effectively tripled the DMA transfer rate because only the target data needed to be transferred to/from the core memory.
Software development systems for the PDP-8 series began with the most basic front panel entry of raw binary machine code. In the middle era, PAL-8 assembly language source code was often stored on paper tape, read into memory, and saved to paper tape, and later assembled from paper tape into memory. Paper tape versions of a number of programming languages were available, including DEC's FOCAL interpreter and a 4K FORTRAN compiler and runtime. Toward the end of the PDP-8 era, operating systems such as OS/8 and COS-310 allowed a traditional line-mode editor and command-line compiler development system using languages such as PAL-III assembly language, FORTRAN, BASIC, and DIBOL.
Early PDP-8 systems did not have an operating system, just a front panel and run and halt switches. Various papertape "operating systems" were developed, as were single user disk operating systems. Toward the end of the PDP-8 era, fairly modern and advanced RTOS and preemptive multitasking multi-user systems were available: a real-time system (RTS-8) was available as were multiuser commercial systems (COS-300 and COS-310) and a dedicated single-user word-processing system (WPS-8).
A time-sharing system, TSS-8, was also available. TSS-8 allowed multiple users to log into the system via 110-baud terminals, and edit/compile/debug programs. Languages included a special version of BASIC, a FORTRAN subset similar to FORTRAN-1 (no user-written subroutines or functions), an ALGOL subset, FOCAL, and an assembler called PAL-D.
A fair amount of user-donated software for the PDP-8 was available from DECUS, the Digital Equipment Corporation User Society, and often came with full source listings and documentation.
Basic instructions:
A wide variety of operations are available through the OPR microcoded instructions including most of the conditional branch (skip) instructions. In general, the operations within each Group can be combined by OR'ing the bit patterns for the desired operations into a single instruction. If none of the bits are set, the result is the NOP instruction.
Group 1 operations:
Group 2 operations:
Here is an example of a complete PDP-8 assembly language program: "Hello, world!" written for the PAL-III assembler.
*10 / Set current assembly origin to address 10, STPTR, 0 / an auto-increment register (one of eight at 10-17) *200 / Set current assembly origin to program text area HELLO, CLA CLL / Clear AC and Link (carry) TAD (STRNG-1) / Set up string pointer in PRE-auto-increment register DCA STPTR / : NEXT, CLA CLL / Clear AC and Link again (needed when we loop back from tls) TAD I STPTR / Get next character, indirect via PRE-auto-increment address SNA / Skip if non-zero (not end of string) HLT / Else halt on zero (end of string) TLS / Output the character in the AC to the teleprinter TSF / Skip if teleprinter ready for character JMP .-1 / Else jump back and try again JMP NEXT / Jump back for the next character STRNG, 310 / H 345 / e 354 / l 354 / l 357 / o 254 / , 240 / (space) 367 / w 357 / o 362 / r 354 / l 344 / d 241 / ! 0 / End of string
For example, here is "Hello, World!" re-written to use a subroutine:
*200 / Set assembly origin (load address) HELLO, CLA CLL / Clear the AC and the Link bit TAD (DATA-1) / Point AC just *BEFORE* the data (accounting for later pre-increment behavior) DCA 10 / Put that into one of ten auto-pre-increment memory locations LOOP, TAD I 10 / Pre-increment mem location 10, fetch indirect to get the next character of our message SNA / Skip on non-zero AC HLT / Else halt at end of message JMS OUT1 / Write out one character JMP LOOP / And loop back for more OUT1, 0 / Will be replaced by caller's updated PC TSF / Skip if printer ready JMP .-1 / Wait for flag TLS / Send the character in the AC CLA CLL / Clear AC and Link for next pass JMP I OUT1 / Return to caller DATA, "H / A well-known message "e / "l / NOTE: "l / "o / Strings in PAL-8 and PAL-III were "sixbit" ", / To use ASCII, we'll have to spell that out, character by character " / "w / "o / "r / "l / "d / "! / 015 / 012 / 0 / Mark the end of our .ASCIZ string ('cause .ASCIZ hadn't been invented yet!)
This dedicated storage for the return address made the use of reentrancy and recursion difficult because the programmer would have needed to explicitly store away the return address onto a programmer-maintained stack. It also made it difficult to use ROM with the PDP-8 because read-write return-address storage was commingled with read-only code storage in the address space. Programs intended to be placed into ROMs approached this problem in several ways:
Because there was only a single interrupt line on the I/O bus, the occurrence of an interrupt conveyed no information to the processor about the source of the interrupt. Instead, the interrupt service routine had to serially poll each active I/O device to see if it was the source of the interrupt; the code that did this was usually referred to as a skip chain because it consisted of a lot of PDP-8 "test and skip if flag set" I/O instructions. (It was also not unheard-of for a skip chain to reach its end and not have found any device in need of service.) The relative interrupt priority of the I/O devices was determined by their position in the skip chain with devices nearer the front of the skip chain having higher priority for service.