int program_counter = 0; int memory*; while (TRUE) { a = memory*; b = memory+ 1; c = memory+ 2; memory= memory*; if (memory* > 0) program_counter += 3; else program_counter = c; }
Unconditional branch:
Z is a location previously initialized to contain 0.
JMP c == subleq Z, Z, c
(The branch is unconditional regardless of whether Z previously contained 0, but to prevent overwriting the contents of Z, a special reserved location should be used.)
In any instruction, the conditional branch can be suppressed by pointing it at the instruction that would have been executed next in any case. If the parameter c is missing, it is implied that this is the case.
Addition can be performed as reversed subtraction:
ADD a,b == subleq a, Z subleq Z, b subleq Z, Z
(Here all the branches have been suppressed.) The first instruction computes the negation of a and stores it in location Z. The second instruction subtracts -a from b; the third instruction restores the value 0 to Z. A copy instruction can be implemented similarly:
STO a,b == subleq b,b subleq a,Z subleq Z,b subleq Z,Z
Any desired arithmetic test can be built out of the ≤0 relation. For example, a branch-if-zero condition can be assembled from the following instructions:
BEQ b,c == subleq b, Z, L1 subleq Z, Z, OUT L1:subleq Z, Z subleq Z, b, c OUT:...
The accumulator is subtracted from the memory location and the next instruction is skipped if there was a borrow (memory location was smaller than the accumulator). The result is stored in both the accumulator and the memory location. The program counter is memory location 0.
To set x to the value of y minus z:
RSSB x RSSB x RSSB x RSSB z RSSB x RSSB temp RSSB temp RSSB temp RSSB temp RSSB y RSSB temp RSSB temp RSSB x RSSB temp RSSB temp RSSB temp RSSB temp
Moves the contents of one memory location to another memory location. Arithmetic is performed using a memory-mapped ALU, and jumps are performed using a memory-mapped program counter. A computer was made from the Wireworld cellular automaton using this design. Douglas Jones wrote an essay on this architecture for ACM describing his architecture and how it worked. [http://www.cs.uiowa.edu/~jones/arch/risc/
The Transport Triggered Architectures can be seen as a kind of move architecture. *
This article is licensed under the GNU Free Documentation License.
It uses material from the
"One instruction set computer".
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