Machine code or machine language is a system of instructions and data directly understandable by a computer's central processing unit.
The "words" of a machine. Instructions are patterns of bits with different patterns corresponding to different commands to the machine.
Every CPU model has its own machine code, or instruction set, although there is considerable overlap between some. If CPU A understands the full language of CPU B it is said that A is compatible with B. CPU B may not be compatible with CPU A, as A may know a few codes that B does not.
Some machine languages give all their instructions the same number of bits, while the instruction length differs in others. How the patterns are organised depends largely on the specification of the machine code. Common to most is the division of one field (the opcode) which specifies the exact operation (for example "add"). Other fields may give the type of the operands, their location, or their value directly (operands contained in an instruction are called immediate). Some exotic instruction sets do not have an opcode field (such as Transport Triggered Architectures or the Forth virtual machine), only operand(s). Other instruction sets lack any operand fields, such as NOSCs"*.
Program flow may be influenced by special jump instructions that transfer execution to an instruction other than the following one. Conditional jumps are taken (execution continues at another address) or not (execution continues at the next instruction) depending on some condition.
For example, on the Zilog Z80 processor, the machine code 00000101 causes the CPU to decrement the B processor register. In assembly language this would be written as DEC B.
6 5 5 5 5 6 bits op | rs | rt | rd |shamt| funct R-type op | rs | rt | address/immediate I-type op | target address J-type
rs, rt, and rd indicate register operands; shamt gives a shift amount; and the address or immediate fields contain an operand directly.
For example adding the registers 1 and 2 and placing the result in register 6 is encoded: op | rs | rt | rd |shamt| funct 0 1 2 6 0 32 decimal 000000 00001 00010 00110 00000 100000 binary
Loading a value from the memory cell 68 cells after the one register 3 points to into register 8:
op | rs | rt | address/immediate 35 3 8 68 decimal 100011 00011 01000 00000 00001 000100 binary
Jumping to the address 1025:
op | target address 2 1025 decimal 000010 00000 00000 00000 10000 000001 binary
Computer architecture | Assembly languages | Machine code
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