The Low Pin Count bus, or LPC bus, is used on PC-style personal computers to connect low-bandwidth devices to the CPU, such as the boot ROM and the "legacy" I/O devices (behind a super I/O chip). The "legacy" I/O devices usually include serial and parallel ports, keyboard, mouse, and the floppy disk controller. The physical wires of the LPC bus usually connect to the southbridge device on a PC platform.

The LPC bus is often used in place of the Industry Standard Architecture (ISA) bus and appears like ISA towards software, although it is physically quite different.

The LPC specification defines seven mandatory signals required for bidirectional data transfer. Four of these signals carry the multiplexed address and data. The other three are control signals (frame, reset and clock).

The six optional signals defined in the specification can be used for interrupt support, direct memory access, waking the system from a low power ("sleeping") state and notifying the LPC peripheral that power will soon be removed.

Although the LPC bus has only four data lines instead of the 8 or 16 of the ISA bus, it has slightly more bandwidth due to its 33 MHz operation instead of 8 MHz.

LPC's main advantage is that it requires only seven signals, and is therefore easy to route on modern motherboards, which are often quite crowded. An integrated circuit using LPC will need 30 to 72 fewer pins than its ISA equivalent. Also, LPC is intended to be a motherboard-only bus. No connector is defined, and no LPC peripheral daughterboards are available.

The LPC specification was authored by Intel.

External links

• LPC Interface Specification at Intel
• Serialized IRQ Support For PCI Systems (Microsoft Word format) - used by the LPC bus

Computer buses

Low Pin Count | LPC magistralė