The Intel 8080 was an early microprocessor designed and manufactured by Intel. The 8-bit CPU was released in April 1974 running at 2 MHz, and is generally considered to be the first truly usable microprocessor CPU design.
All processor commands were coded by one byte, but some of them were followed by one or two bytes of data, a memory address, or a port number. The register-to-register data-move commands were all coded by one byte, making up about a quarter of the commands in the processor-command system. The processor had 8 commands to call the subroutines located at the fixed addresses at the beginning or the address space (RST). These commands were frequently used in the interrupt-handling or system-library calls.
The most sophisticated command (and the longest to execute) was XTHL, which was used for exchanging the register pair HL with the value, stored at address, indicated by the stack pointer.
One of the bits in the processor state word (see below) was indicating that the processor is accessing data from the stack. Using this signal, it was possible to implement the separate stack memory space. However this feature was seldom used.
For the more complicated system, during one phase of its working loop the processor set its "internal state byte" on the data bus. This byte contains flags which indicate whether the memory or I/O port is accessed and whether it was necessary to handle an interrupt.
The interrupt system state (enabled or disabled) was also output on a separate pin. For simple systems, where the interrupts were not used, it is possible to find cases where this pin is used as an additional single-bit output port (the Russian popular Radio86RK computer, for instance).
The processor required three power sources (-5, +5 and +12 Volt(V)) and two non-interlacing high-amplitude synchronization signals. However at least the late Soviet version КР580ВМ80А was able to work with the single +5 V power source, +12 V pin being connected to the same +5 V and -5 V pin - to the ground. The processor consumed about 1.3 Watts(W) of power.
The pin usage table was described in the chip accompanying documentation as following:
| Pin number | Signal | Type | Comment |
|---|---|---|---|
| 1 | A10 | Output | Address bus 10 |
| 2 | GND | - | Ground |
| 3 | D4 | Bidirectional | Bidirectional data bus. The processor also transiently sets here the "processor state", providing information that the processor is currently doing:
|
| 4 | D5 | ||
| 5 | D6 | ||
| 6 | D7 | ||
| 7 | D3 | ||
| 8 | D2 | ||
| 9 | D1 | ||
| 10 | D0 | ||
| 11 | -5 V | - | The -5 V power supply. This must be the first power source connected and the last disconnected, otherwise the processor will be damaged. |
| 12 | R | Input | Reset. The signal forces execution of commands, located at address 0000. The content of other processor registers is not modified. This is an inverting input (the active level being logical 0) |
| 13 | DMA | Input | Direct memory access request. The processor is requested to switch the data and address bus to the high impedance ("disconnected") state. |
| 14 | INT | Input | Interrupt request |
| 15 | CLC2 | Input | The second phase of the clock generator signal |
| 16 | ACK INT | Output | The processor had two commands for setting the 0 or 1 level on this pin. The pin normally was supposed to be used for the interrupt control. However in the simple computers it was sometimes used just as the single bit output port for various purposes. |
| 17 | RD | Output | Read (the processor reads from memory or input port) |
| 18 | WR | Output | Write (the processor writes to memory or output port). This is the inverted output, the active level being logical zero. |
| 19 | S | Output | The active level indicates that the processor has set the "state word" on the data bus. The various bits of this state word provided the additional information for supporting the separate address and memory spaces, interrupts and direct memory access. This signal required to pass through additional logic before it could be used to write the processor state word from the data bus into some register. |
| 20 | 5 V | - | The + 5 V power supply |
| 21 | ACK DMA | Output | Direct memory access confirmation. The processor switches data and address pins into the high impedance state, allowing other device to manipulate the bus |
| 22 | CLC1 | Input | The first phase of the clock generator signal |
| 23 | RDY | Input | Wait. With this signal it was possible to suspend processor's work. It was also used to support the hardware-based step-by step debugging mode. |
| 24 | WAIT | Output | Wait (indicates that the processor is in the waiting state) |
| 25 | A0 | Output | Address bus |
| 26 | A1 | ||
| 27 | A2 | ||
| 28 | 12 V | - | The +12 V power supply. This must be the last connected and first disconnected power source. |
| 29 | A3 | Output | The address bus, can switch into high impedance state on demand |
| 30 | A4 | ||
| 31 | A5 | ||
| 32 | A6 | ||
| 33 | A7 | ||
| 34 | A8 | ||
| 35 | A9 | ||
| 36 | A15 | ||
| 37 | A12 | ||
| 38 | A13 | ||
| 39 | A14 | ||
| 40 | A11 | ||
Literature, used for this table:
The 8080 integrated circuit was manufactured in a NMOS process using a minimum feature size of 6 µm. A single layer of metal was used to interconnect the approximately 6000 transistors in the design (the higher resistance polysilicon layer required to implement transistor gates were also used for some interconnect). The die size was approximately 20 mm².
Shortly after the launch of the 8080, the Motorola 6800 competing design was introduced, and after that, the MOS Technology 6502 variation of the 6800. Zilog introduced the Z80, which had a compatible machine-language instruction set and initially used the same assembly language as the 8080, but for legal reasons, Zilog developed a syntactically-different alternative assembly language for the Z80. At Intel, the 8080 was followed by the compatible and electrically more elegant 8085, and later by the assembly language compatible 16-bit 8086 and then the 8/16-bit 8088, which was selected by IBM for its new PC to be launched in 1981. The 8080, via its ISA, thus made a lasting impact on computer history.
The Soviet Union manufactured the complete 8080 analog KP580ИK80 (later marked as KP580BM80), where even pins were placed identically. This processor was the base of the Radio86RK, probably the most popular amateur single-board computer in the Soviet Union. According to some sources, the Soviet analog had two undocumented instructions, specific to its self, these however were not widely known.
As the 8080 evolved into the largely compatible x86 family, and PC's evolved into workstations and servers of 32 and 64 bits, with advanced memory protection, segmentation, and multiprocessing features, blurring the difference between small and large computers. The size of chips has grown so that the size and power of large x86 chips is not much different from high end architecture chips, and a common strategy to produce a very large computer is to network many x86 processors.
The basic architecture of the 8080 and its successors has replaced many propriety midrange and mainframe computers, and withstood challenges of technologies such as RISC. Most computer manufacturers have abandoned producing their own processors below the highest performance points. Though x86 may not be the most elegant, or theoretically most efficient design, the sheer market force of so many dollars going into refining a design has made the x86 family today, and will remain for some time, the dominant processor architecture, even bypassing Intel's attempts to replace it with incompatible architectures such as the iAPX 432 and Itanium.
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