The Athlon 64 is an eighth-generation, AMD64 architecture microprocessor produced by AMD, released on September 23, 2003. It is the third processor to bear the name "Athlon", and the immediate successor to the Athlon XP. The second processor (after the Opteron) to implement AMD64 architecture and the first 64-bit processor targeted at the average consumer, it is AMD's primary consumer microprocessor, and competes primarily with Intel's Pentium 4, especially the "Prescott" and "Cedar Mill" core revisions. It is AMD's first K8, eighth-generation processor core for desktop and mobile computers. Despite being natively 64-bit, the AMD64 architecture is backwards-compatible with 32-bit, x86 instructions. Athlon 64s have been produced for Socket 754, Socket 939, Socket 940 and Socket AM2.
The Athlon 64 was originally codenamed "ClawHammer" by AMD, and was referred to as such internally and in press releases. The first Athlon 64 FX was based on the first Opteron core, "SledgeHammer". Both cores, produced on a 130 nanometer process, were first introduced on September 23, 2003. The models first available were the FX-51, fitting Socket 940, and the 3200+, fitting Socket 754. Like the Opteron it was based on, the Athlon FX-51 required buffered RAM, increasing the final cost of an upgrade. The week of the Athlon 64's launch, rival CPU manufacturer released the Pentium 4 Extreme Edition, a CPU designed to compete with the Athlon 64 FX. The Extreme Edition was widely considered a marketing ploy to gain publicity away from AMD, and was quickly nicknamed among some circles the "Emergency Edition". Despite a very strong demand for the chip, AMD was plagued by early manufacturing difficulties that made it difficult to deliver Athlon 64s in quantity. In the early months of the Athlon 64 lifespan, AMD could only produced one hundred thousand chips per month. However, it was very competitive in terms of performance to the Pentium 4, with magazine PC World calling it the "fastest yet". "Newcastle" was released soon after ClawHammer, with half the Level 2 cache.
On June 1, 2004, AMD released new versions of both the ClawHammer and Newcastle core revisions for the newly-introduced Socket 939, an altered Socket 940 without the need for buffered memory. Socket 939 offered two main improvements over Socket 754: the memory controller was altered with dual-channel architecture, doubling peak memory bandwidth, and the HyperTransport bus was increased in speed from 800 MHz to 1000 MHz. Socket 939 also was introduced in the FX series in the form of the FX-55. At the same time, AMD also began to ship the "Winchester" core, based on a 90 nanometer process.
Core revisions "Venice" and "San Diego" succeeded all previous revisions on April 15, 2005. Venice, the lower-end part, was produced for both Sockets 754 and 939, and included 512 KiB of L2 cache. San Diego, the higher-end chip, was produced only for Socket 939 and doubled Venice's L2 cache to one MiB. Both were produced on the 90 nm fab process. Both also included support for the SSE3 instruction set, a new feature that had been included in the rival Pentium 4 since the release of the Prescott core in February 2004. In addition, AMD overhauled the memory controller for this revision, resulting in performance improvements as well as support for newer DDR RAM.
The Athlon 64 had been maligned by some critics for some time because of its lack of support for DDR2 SDRAM, an emerging technology that had been adopted much earlier by Intel. AMD's official position was that the CAS latency on DDR2 had not progressed to a point where it would be advantageous for the consumer to adopt it. AMD finally remedied this gap with the "Orleans" core revision, the first Athlon 64 to fit Socket AM2, released on on May 23, 2006. "Windsor", an Athlon 64 X2 revision for Socket AM2, was released concurrently. Both Orleans and Windsor have 1 MiB of L2 cache per core. The Athlon 64 FX-62 was also released concurrently on the Socket AM2 platform. Socket AM2 also consumes less power than previous platforms, and also supports AMD's virtualization technology.
There are four variants: Athlon 64, Athlon 64 FX, Mobile Athlon 64 (later renamed "Turion 64") and the dual-core Athlon 64 X2. Common among the Athlon 64 line are a variety of instruction sets including MMX, SSE, SSE2, 3DNow!, and AMD64. All Athlon 64s with the exception of the original ClawHammer release also support the NX bit, a security feature named "Enhanced Virus Protection" by AMD. And as implementations of the AMD64 architecture, all Athlon 64 variants are able to run 16 bit, 32 bit x86, and AMD64 code, through two different modes the processor can run in: "Legacy mode" and "long mode". Legacy mode runs 16-bit and 32-bit programs natively, and long mode runs 64-bit programs natively, but also allows for 32-bit programs running inside a 64-bit operating system. All Athlon 64 processors feature 128 kibibytes of level 1 cache, and at least 512 kibibytes of level 2 cache.
The Athlon 64 features an on-die memory controller, a feature not previously seen on x86 CPUs. Not only does this mean the controller runs at the same clock rate as the CPU itself, it also means the electrical signals have a shorter physical distance to travel compared to the old northbridge interfaces. The result is a significant reduction in latency (response time) for access requests to main memory. The lower latency is often cited as one of the advantages of the Athlon 64's architecture over those of its competitors.
Translation Lookaside Buffers (TLBs) have also been enlarged (40 4k/2M/4M entries in L1 cache, 512 4k entries), with reduced latencies and improved branch prediction, with four times the number of bimodal counters in the global history counter. This and other architectural enhancements, especially as regards SSE implementation, improve instruction per cycle (IPC) performance over the previous Athlon XP generation. To make this easier for consumers to understand, AMD has chosen to market the Athlon 64 using a PR rating (Performance Rating) system, where the numbers roughly map to Pentium 4 performance equivalents, rather than actual clock speed.
Athlon 64 also features CPU speed throttling technology branded Cool'n'Quiet, a feature similar to Intel's SpeedStep that can throttle the processor's clock speed back to facilitate lower power consumption and heat production. When the user is running undemanding applications and the load on the processor is light, the processor's clock speed and voltage are reduced. This in turn reduces its peak power consumption (max TDP set at 89 W by AMD) to as low as 32 W (stepping C0, clock speed reduced to 800 MHz) or 22W (stepping CG, clock speed reduced to 1 GHz). The Athlon 64 also has an Integrated Heat Spreader (IHS) which prevents the CPU core from accidentally being damaged when mounting and unmounting cooling solutions. With prior AMD CPUs a CPU shim could be used by people worried about damaging the core.
The No Execute bit (NX bit) supported by Windows XP Service Pack 2, Windows XP Professional x64 Edition, Windows Server 2003 x64 Edition, and Linux 2.6.8 and higher is also included, for improved protection from malicious buffer overflow security threats. Hardware-set permission levels make it much more difficult for malicious code to take control of the system. It is intended to make 64-bit computing a more secure environment.
The Athlon 64 CPUs have been produced with 130 nm and 90 nm SOI process technologies. All of the latest chips (Winchester, Venice and San Diego models) are on 90 nm. The Venice and San Diego models also incorporate dual stress liner technology (an amalgam of strained silicon and 'squeezed silicon', the latter of which is not actually a technology) co-developed with IBM.
As the memory controller is integrated onto the CPU die, there is no FSB for the system memory to base its speed upon. Instead, system memory speed is obtained by using the following formula (using the ceiling function):
In simpler terms, the memory is always running at a set fraction of the CPU speed, with the divisor being a whole number. An 'FSB' figure is still used to determine the CPU speed, but the RAM speed is no longer directly related to this 'FSB' figure (known otherwise as the LDT).
At the introduction of Athlon 64 in September 2003, only Socket 754 and Socket 940 (Opteron) were ready and available. The onboard memory controller was not capable of running unbuffered (non-registered) memory in dual-channel mode at the time of release; as a stopgap measure, they introduced the Athlon 64 on Socket 754, and brought out a non-multiprocessor version of the Opteron called the Athlon 64 FX, as a multiplier unlocked enthusiast part for Socket 940, comparable to Intel's Pentium 4 Extreme Edition for the high end market.
In June 2004, AMD released Socket 939 as the mainstream Athlon 64 with dual-channel memory interface, leaving Socket 940 solely for the server market (Opterons), and relegating Socket 754 as a value/budget line, for Semprons and slower versions of the Athlon 64. Eventually Socket 754 replaced Socket A for Semprons.
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