WDC 65C02

The WDC 65C02 8-bit CPU is an upgraded CMOS version of the popular MOS Technology 6502 microprocessor, the redesign being made by Bill Mensch of the Western Design Center (WDC). The 65C02 was second-sourced by NCR, GTE, Rockwell, Synertek and Sanyo.

Introduction

The W65C02S is a low power, cost effective 8-bit microprocessor. It is a fully static core which allows the primary clock (PHI2) to be slowed down indefinitely or fully stopped in either the high or low state. The variable length instruction set and manually optimized core size make the W65C02S an excellent choice for low power System-on-Chip (SoC) designs.

The Verilog RTL model is available for ASIC design flows. To aid in system development, WDC also provides a Development System that includes a W65C02DB Developer Board, an In-Circuit Emulator (ICE) and the W65CSDS Software Development System.

Features of the W65C02S

8-bit data bus 8-bit ALU, Accumulator, Stack Pointer, Index Registers, Processor Status Register 16-bit Program Counter 69 instructions 16 addressing modes 212 Operation Codes (OpCodes) Wide operating voltage range (Specified at 1.8, 2.5, 3.0, 3.3, 5.0 v +/- 5%) Low Power consumption, 150uA@1MHz 16-bit address bus provides access to 65,536 bytes of memory space Vector Pull (VPB) output indicates when interrupt vectors are being addressed WAit-for-Interrupt (WAI) and SToP (STP) instructions reduce power consumption, decrease interrupt latency and enable synchronization with external events Variable length instruction set enables smaller code optimization over fixed length instruction set processors. This results in low power as well Fully static circuitry allows stopping the clock to conserve power

W65C02S Datasheet

Complete W65C02S Datasheet is available for downloading.

Comparison with the 6502

The 65C02 shared its predecessor's 8-bit instruction set architecture and 16-bit memory addressing, but added a small number of documented opcodes, did away with illegal opcodes, and, significantly, fixed the irksome "indirect jump page wrap bug" that caused fits for so many budding assembly language programmers.

Another problem with the 6502, fixed in the 65C02, relates to its program status register, which contains eight system flags. Some flags are set or reset under program control. Others reflect the status of the machine after mathematical instructions:

N Negative sign flag
V Overflow flag
1 Always 1
B Break flag, set by the BRK instruction
D Decimal mode flag
I IRQ disable flag
Z Zero flag
C Carry Flag

In the 6502 the decimal flag (D) was not initialised during a reset. This meant it would be in an unpredictable state after a reset, and could lead to arbitrary behaviour. This forced programmers to use CLD instructions after resets on all 6502 programs.

Some variants of the 65C02 (including the W65C02S) added individual bit manipulation operations (RMB, SMB, BBR and BBS). The 65SC02 was also available, which lacked these operations.

Notable uses of the 65C02

Acorn Computers Ltd:
- BBC Master home computer (65C102)
Apple Computer:
- Apple //c portable computer
- Enhanced Apple IIe home computer
Atari, Inc.:
- Atari Lynx handheld game console (65SC02)
NEC Corporation
- PC Engine (TurboGrafx-16)
Others:
- TurboMaster accelerator cartridge for the Commodore 64 (speedup from ~1 to ~4 MHz)
- Time Top Gameking handheld game consoles (6 MHz)
- Watara Supervision handheld game consoles (4 MHz)
- mephisto MMV chesscomputer (at 4 MHz - 20 Mhz)

External links

Microprocessors